Senior ASIC Design Verification Engineer
Senior Verification Engineer Job At NVIDIA
NVIDIA is seeking a hardworking Senior ASIC Design Verification Engineer to help drive sign-off strategies for world's leading GPUs and SoCs. This position offers you an outstanding opportunity to influence performance of the next generation GPU and SoC, allowing you to have real impact in a multifaceted, technology-focused company with product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence!
We have crafted a team of highly motivated people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing.
What you will be doing:
* Work as part of Global Circuits Team to develop various innovative IPs for hardware security, clocking, voltage regulation and silicon correlation.
* Own the unit and sub-system level verification of various IPs, create functional test plans, and verify using advanced verification tools, flows and methodologies.
* Build and reform world class verification infrastructure and methodologies to meet the unique demands of custom designed IPs.
* Engage in design specification development by participating in discussions on architecture, intent, and implementation of the various IPs.
* Enable system level integration by working with partner teams for test development & debug and delivering Verification IPs.
What we need to see:
* BSEE (or equivalent experience) with 5+ years' experience in unit level or sub-system level verification or MS preferred in Electrical, Computer Engineering with 3+ years' experience in unit level or sub-system level verification.
* Proficiency with Object Oriented Programming, System Verilog, Verilog, UVM, SVA and Functional Coverage.
* Strong skills with VCS or equivalent simulation tools like Questa is required.
* Strong debugging and analytical skills are required.
* Have a continuous improvement mentality and passionate about delivering bug-free first silicon.
* Strong interpersonal skills and ability to work with on-site and remote teams is a plus.
Ways to stand out from the crowd:
* Experience in verification using random stimulus along with functional coverage and assertion-based verification methodologies is a huge plus.
* Strong knowledge or work experience in Mixed signal and custom designed IPs solutions.
* Good understanding of behavioral real number modeling and low level digital or mixed signal design concepts.
* Strong knowledge or work experience in co-simulation environments such as VCS-XA or equivalent tools, Gate Level Simulation or Formal Equivalence domains.
* Proficiency in scripting language, such as, Perl, Tcl, Make files and automation methods/algorithms a certain plus.
With competitive salaries and a generous benefits package, NVIDIA is widely considered to be one of the technology world's most desirable employers. We welcome you join our team with some of the most hard-working people in the world working together to promote rapid growth. Are you passionate about becoming a part of a best-in-class team supporting the latest in GPU and AI technology? If so, we want to hear from you.
#LI-Hybrid
The base salary range is 136,000 USD - 264,500 USD. Your base salary will be determined based on your location, experience, and the pay of employees in similar positions.
You will also be eligible for equity and benefits. NVIDIA accepts applications on an ongoing basis.
NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.
Senior Mixed-Signal Design Verification Engineer
Senior Verification Engineer Job At NVIDIA
We are looking for an Engineer to verify the design and implementation of the world's leading SoC's and GPU's. This position offers the opportunity to have real impact in a multifaceted, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence!
We have crafted a team of extraordinary people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the high-speed Serdes platform for the future of computing. Join our dynamic team today!
What you'll be doing:
As a key member of our circuit verification team, you will verify the design and implementation of the industry's leading GPU
Be responsible for verification of the Mixed Signal CMOS circuit design, architecture, golden models using advanced verification methodologies
Understand sophisticated mixed-signal CMOS circuits design and implementation, define the verification scope, develop the verification infrastructure and verify the correctness of the design
You'll closely with multi-functional teams, circuit and logic design, verification, test engineering to accomplish tasks
What we need to see:
Bachelors Degree in EE, CS or CE (or equivalent experience)
5+ years of proven experience
Experience in deep sub-micron process design experience in CMOS Analog / Mixed Signal Circuit Design
Skilled using design and verification tools (Cadence's IC design environment, analog circuit simulation tools like HSpice, Finesim, XA)
Experience in crafting test bench environments for component and top level circuit verification
Expertise in System Verilog or similar HVL
Have strong debugging and analytical skills
Perl and C/C++ programming language experience desirable
Strong interpersonal skills and ability & desire to work as a great teammate are huge plus
The base salary range is 136,000 USD - 264,500 USD. Your base salary will be determined based on your location, experience, and the pay of employees in similar positions.
You will also be eligible for equity and benefits.
NVIDIA accepts applications on an ongoing basis.
NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.
ASIC Verification Engineer
San Jose, CA Jobs
Who We Are
The Common Hardware Group (CHG) delivers the silicon, optics, and hardware platforms for Cisco's core Switching, Routing, and Wireless products. We design the networking hardware for Enterprises and Service Providers of various sizes, the Public Sector, and Non-Profit Organizations across the world. Cisco Silicon One (#CiscoSiliconOne) is the only unifying silicon architecture in the market that enables customers to deploy the best-of-breed silicon from Top of Rack (TOR) switches all the way through web scale data centers and across service provider, enterprise networks, and data centers with a fully unified routing and switching portfolio. Come join us and take part in shaping Cisco's ground-breaking solutions by designing, developing and testing some of the most complex ASICs being developed in the industry.
What You'll Do
As ASIC Verification Engineer in The Core Hardware Business Unit, you will be engaged the following tasks:
•Implementation of DV infrastructure for block, cluster and top level environments.
•Maintaining existing DV environments and enhancing them
•Ensuring complete verification coverage through implementation and review of code and functional coverage.
•Working closely with architects and designers to ensure verification completeness.
•Supporting tests done with emulation
•Engage in tasks to prepare for post-silicon-validation
Who You'll Work With
Come join us and take part in shaping Cisco's revolutionary solutions for data centers by designing some of the most complex chips being developed in the industry with the opportunity to get full exposure to all aspects of the systems and applications we build (Silicon, Hardware, Software, telemetry, security, etc). Our group offers a unique combination of a startup culture with the benefits of working for the leading networking company in the world
Who You Are
•Have a good understanding of the fundamentals of ASIC Design verification principles.
•Ability to understand functional specifications outlined in design documentation to develop verification plan.
•Have good communication, interpersonal skills and a keen interest to work closely in a team environment.
•Networking knowledge preferred, but not essential.
Minimum Qualifications
•Bachelors of Science in Electrical Engineering or Computer Science or related degree
•5+ years of experience in high-performance ASIC verification.
•Experience with System Verilog HVL and HDL languages/tools
•Experience with Scripting and programming languages such as C++, Python or Perl, Shell
•Experience with object-oriented programming.
Preferred Qualifications
•Experience in emulation-based verification
•Experience with Networking knowledge
•Master's degree with 3+ years in high-performance ASIC verification.
•Experience with ASIC design and verification methodologies and flows.
Why Cisco?
#WeAreCisco. We are all unique, but collectively we bring our talents to work as a team, to develop innovative technology and power a more inclusive, digital future for everyone. How do we do it? Well, for starters - with people like you!
Nearly every internet connection around the world touches Cisco. We're the Internet's optimists. Our technology makes sure the data traveling at light speed across connections does so securely, yet it's not what we make but what we make happen which marks us out. We're helping those who work in the health service to connect with patients and each other; schools, colleges, and universities to teach in even the most challenging of times. We're helping businesses of all shapes and sizes to connect with their employees and customers in new ways, providing people with access to the digital skills they need and connecting the most remote parts of the world - whether through 5G, or otherwise.
We tackle whatever challenges come our way. We have each other's backs, we recognize our accomplishments, and we grow together. We celebrate and support one another - from big and small things in life to big career moments. And giving back is in our DNA (we get 10 days off each year to do just that).
We know that powering an inclusive future starts with us. Because without diversity and a dedication to equality, there is no moving forward. Our 30 Inclusive Communities, that bring people together around commonalities or passions, are leading the way. Together we're committed to learning, listening, caring for our communities, whilst supporting the most vulnerable with a collective effort to make this world a better place either with technology, or through our actions.
So, you have colorful hair? Don't care. Tattoos? Show off your ink. Like polka dots? That's cool. Pop culture geek? Many of us are. Passion for technology and world changing? Be you, with us! #WeAreCisco
FPGA Design and Verification Engineer
Orlando, FL Jobs
You will be a FPGA Design & Verification Engineer at Lockheed Martin, responsible for designing, simulating, and integrating Field-Programmable Gate Arrays (FPGAs) to design and develop Advanced EO/IR Fire Control system. Our team is looking for a talented engineer to join our team and support the development of cutting-edge technologies.
What You Will Be Doing
As a FPGA Design & Verification Engineer for Advance Program area, you will be responsible for capturing and deriving requirements, performing detailed design, simulation, and integration of FPGAs to develop advance EO product system solution. You will also perform integration, troubleshooting, and design updates as required for existing FPGA designs as well as develop new FPGA solution. Candidate will perform the design, development, and implementation of FPGA design including simulation verification. Your responsibilities will include:
* Capturing and deriving requirements for FPGA designs
* Working with Xilinx/AMD or Microchip FPGA to development solution for Complex Electronic System
* Performing detailed design, simulation, and integration of FPGAs
* Integrating, troubleshooting, and updating existing FPGA designs
* Designing and implementing new FPGA designs for future capabilities
* Supporting all FPGA designs, including:
* External peripherals as well as High speed data interfaces.
* Utilizing prior experience with Microchip FPGAs, Xilinx FPGAs, UVM, and GitLab to support FPGA design and development
Why Join Us
Do you want to be part of a company culture that empowers employees to think big, lead with a growth mindset, and make the impossible a reality? We provide the resources and give you the flexibility to enable inspiration and focus. If you have the passion and courage to dream big, work hard, and have fun doing what you love then we want to build a better tomorrow with you.
We offer flexible work schedules to comprehensive benefits investing in your future and security, Learn more about Lockheed Martin's comprehensive benefits package here.
Further Information About This Opportunity:
This position is in Orlando. Discover more about our Orlando, Florida location.
MUST BE A U.S. CITIZEN - This position is located at a facility that requires special access. An active Secret Clearance with most recent investigation in the last 5 years is required to start.
Basic Qualifications:
* Bachelor's degree or higher in Electrical or Computer Engineering.
* Relevant experience with FPGA design and simulation verification.
* Strong communications, collaboration, and presentation skills.
Desired Skills:
* MSEE, MSCE would be a plus.
* Experience with System-Verilog, Verilog, C/C++, MatLab / Simulink, System Verilog languages; Synopsis Synplify, Synopsis VCS, NCSim, ChipScope tool sets desired.
* Experience with Xilinx/AMD and MicroSemi/Microchip part families internal FPGA fabric and IP.
* FPGA design experience with tools noted above.
* Previous experience related to aerospace design techniques would be a plus.
* Prior experience with Lockheed Marin MFC is a plus
* Prior experience with EO system is a plus
* Existing Active Secret Security clearance
Security Clearance Statement: This position requires a government security clearance, you must be a US Citizen for consideration.
Clearance Level: Secret with Investigation or CV date within 5 years
Other Important Information You Should Know
Expression of Interest: By applying to this job, you are expressing interest in this position and could be considered for other career opportunities where similar skills and requirements have been identified as a match. Should this match be identified you may be contacted for this and future openings.
Ability to Work Remotely: Part-time Remote Telework: The employee selected for this position will work part of their work schedule remotely and part of their work schedule at a designated Lockheed Martin facility. The specific weekly schedule will be discussed during the hiring process.
Work Schedules: Lockheed Martin supports a variety of alternate work schedules that provide additional flexibility to our employees. Schedules range from standard 40 hours over a five day work week while others may be condensed. These condensed schedules provide employees with additional time away from the office and are in addition to our Paid Time off benefits.
Schedule for this Position: 4x10 hour day, 3 days off per week
Lockheed Martin is an equal opportunity employer. Qualified candidates will be considered without regard to legally protected characteristics.
The application window will close in 90 days; applicants are encouraged to apply within 5 - 30 days of the requisition posting date in order to receive optimal consideration.
At Lockheed Martin, we use our passion for purposeful innovation to help keep people safe and solve the world's most complex challenges. Our people are some of the greatest minds in the industry and truly make Lockheed Martin a great place to work.
With our employees as our priority, we provide diverse career opportunities designed to propel, develop, and boost agility. Our flexible schedules, competitive pay, and comprehensive benefits enable our employees to live a healthy, fulfilling life at and outside of work. We place an emphasis on empowering our employees by fostering an inclusive environment built upon integrity and corporate responsibility.
If this sounds like a culture you connect with, you're invited to apply for this role. Or, if you are unsure whether your experience aligns with the requirements of this position, we encourage you to search on Lockheed Martin Jobs, and apply for roles that align with your qualifications.
Experience Level: Experienced Professional
Business Unit: MISSILES AND FIRE CONTROL
Relocation Available: Possible
Career Area: Hardware Engineering
Type: Full-Time
Shift: First
FPGA Design and Verification Engineer
Orlando, FL Jobs
You will be a FPGA Design & Verification Engineer at Lockheed Martin, responsible for designing, simulating, and integrating Field\-Programmable Gate Arrays \(FPGAs\) to design and develop Advanced EO/IR Fire Control system\. Our team is looking for a talented engineer to join our team and support the development of cutting\-edge technologies\.
**What You Will Be Doing**
As a FPGA Design & Verification Engineer for Advance Program area, you will be responsible for capturing and deriving requirements, performing detailed design, simulation, and integration of FPGAs to develop advance EO product system solution\. You will also perform integration, troubleshooting, and design updates as required for existing FPGA designs as well as develop new FPGA solution\. Candidate will perform the design, development, and implementation of FPGA design including simulation verification\. Your responsibilities will include:
- Capturing and deriving requirements for FPGA designs
- Working with Xilinx/AMD or Microchip FPGA to development solution for Complex Electronic System
- Performing detailed design, simulation, and integration of FPGAs
- Integrating, troubleshooting, and updating existing FPGA designs
- Designing and implementing new FPGA designs for future capabilities
- Supporting all FPGA designs, including:
- External peripherals as well as High speed data interfaces\.
- Utilizing prior experience with Microchip FPGAs, Xilinx FPGAs, UVM, and GitLab to support FPGA design and development
**Why Join Us**
Do you want to be part of a company culture that empowers employees to think big, lead with a growth mindset, and make the impossible a reality? We provide the resources and give you the flexibility to enable inspiration and focus\. If you have the passion and courage to dream big, work hard, and have fun doing what you love then we want to build a better tomorrow with you\.
We offer flexible work schedules to comprehensive benefits investing in your future and security, Learn more about Lockheed Martin's comprehensive benefits package here\.
**Further Information About This Opportunity:**
This position is in Orlando\. Discover more about our Orlando, Florida location\.
MUST BE A U\.S\. CITIZEN \- This position is located at a facility that requires special access\. An active Secret Clearance with most recent investigation in the last 5 years is required to start\.
**Basic Qualifications:**
\-Bachelor's degree or higher in Electrical or Computer Engineering\.
\-Relevant experience with FPGA design and simulation verification\.
\-Strong communications, collaboration, and presentation skills\.
**Desired Skills:**
\- MSEE, MSCE would be a plus\.
\- Experience with System\-Verilog, Verilog, C/C\+\+, MatLab / Simulink, System Verilog languages; Synopsis Synplify, Synopsis VCS, NCSim, ChipScope tool sets desired\.
\-Experience with Xilinx/AMD and MicroSemi/Microchip part families internal FPGA fabric and IP\.
\- FPGA design experience with tools noted above\.
\- Previous experience related to aerospace design techniques would be a plus\.
\- Prior experience with Lockheed Marin MFC is a plus
\- Prior experience with EO system is a plus
\-Existing Active Secret Security clearance
**Security Clearance Statement:** This position requires a government security clearance, you must be a US Citizen for consideration\.
**Clearance Level:** Secret with Investigation or CV date within 5 years
**Other Important Information You Should Know**
**Expression of Interest:** By applying to this job, you are expressing interest in this position and could be considered for other career opportunities where similar skills and requirements have been identified as a match\. Should this match be identified you may be contacted for this and future openings\.
**Ability to Work Remotely:** Part\-time Remote Telework: The employee selected for this position will work part of their work schedule remotely and part of their work schedule at a designated Lockheed Martin facility\. The specific weekly schedule will be discussed during the hiring process\.
**Work Schedules:** Lockheed Martin supports a variety of alternate work schedules that provide additional flexibility to our employees\. Schedules range from standard 40 hours over a five day work week while others may be condensed\. These condensed schedules provide employees with additional time away from the office and are in addition to our Paid Time off benefits\.
**Schedule for this Position:** 4x10 hour day, 3 days off per week
**Lockheed Martin is an equal opportunity employer\. Qualified candidates will be considered without regard to legally protected characteristics\.**
**The application window will close in 90 days; applicants are encouraged to apply within 5 \- 30 days of the requisition posting date in order to receive optimal consideration\.**
At Lockheed Martin, we use our passion for purposeful innovation to help keep people safe and solve the world's most complex challenges\. Our people are some of the greatest minds in the industry and truly make Lockheed Martin a great place to work\.
With our employees as our priority, we provide diverse career opportunities designed to propel, develop, and boost agility\. Our flexible schedules, competitive pay, and comprehensive benefits enable our employees to live a healthy, fulfilling life at and outside of work\. We place an emphasis on empowering our employees by fostering an inclusive environment built upon integrity and corporate responsibility\.
If this sounds like a culture you connect with, you're invited to apply for this role\. Or, if you are unsure whether your experience aligns with the requirements of this position, we encourage you to search on Lockheed Martin Jobs , and apply for roles that align with your qualifications\.
**Experience Level:** Experienced Professional
**Business Unit:** MISSILES AND FIRE CONTROL
**Relocation Available:** Possible
**Career Area:** Hardware Engineering
**Type:** Full\-Time
**Shift:** First
FPGA Design and Verification Engineer
Orlando, FL Jobs
You will be a FPGA Design & Verification Engineer at Lockheed Martin, responsible for designing, simulating, and integrating Field-Programmable Gate Arrays (FPGAs) to design and develop Advanced EO/IR Fire Control system. Our team is looking for a talented engineer to join our team and support the development of cutting-edge technologies.
What You Will Be Doing
As a FPGA Design & Verification Engineer for Advance Program area, you will be responsible for capturing and deriving requirements, performing detailed design, simulation, and integration of FPGAs to develop advance EO product system solution. You will also perform integration, troubleshooting, and design updates as required for existing FPGA designs as well as develop new FPGA solution. Candidate will perform the design, development, and implementation of FPGA design including simulation verification. Your responsibilities will include:
• Capturing and deriving requirements for FPGA designs
• Working with Xilinx/AMD or Microchip FPGA to development solution for Complex Electronic System
• Performing detailed design, simulation, and integration of FPGAs
• Integrating, troubleshooting, and updating existing FPGA designs
• Designing and implementing new FPGA designs for future capabilities
• Supporting all FPGA designs, including:
• External peripherals as well as High speed data interfaces.
• Utilizing prior experience with Microchip FPGAs, Xilinx FPGAs, UVM, and GitLab to support FPGA design and development
Why Join Us
Do you want to be part of a company culture that empowers employees to think big, lead with a growth mindset, and make the impossible a reality? We provide the resources and give you the flexibility to enable inspiration and focus. If you have the passion and courage to dream big, work hard, and have fun doing what you love then we want to build a better tomorrow with you.
We offer flexible work schedules to comprehensive benefits investing in your future and security, Learn more about Lockheed Martin's comprehensive benefits package here.
Further Information About This Opportunity:
This position is in Orlando. Discover more about our Orlando, Florida location.
MUST BE A U.S. CITIZEN - This position is located at a facility that requires special access. An active Secret Clearance with most recent investigation in the last 5 years is required to start.
Basic Qualifications
-Bachelor's degree or higher in Electrical or Computer Engineering.
-Relevant experience with FPGA design and simulation verification.
-Strong communications, collaboration, and presentation skills.
Desired skills
- MSEE, MSCE would be a plus.
- Experience with System-Verilog, Verilog, C/C++, MatLab / Simulink, System Verilog languages; Synopsis Synplify, Synopsis VCS, NCSim, ChipScope tool sets desired.
-Experience with Xilinx/AMD and MicroSemi/Microchip part families internal FPGA fabric and IP.
- FPGA design experience with tools noted above.
- Previous experience related to aerospace design techniques would be a plus.
- Prior experience with Lockheed Marin MFC is a plus
- Prior experience with EO system is a plus
-Existing Active Secret Security clearance
Lockheed Martin is an equal opportunity employer. Qualified candidates will be considered without regard to legally protected characteristics.
The application window will close in 90 days; applicants are encouraged to apply within 5 - 30 days of the requisition posting date in order to receive optimal consideration.
*
At Lockheed Martin, we use our passion for purposeful innovation to help keep people safe and solve the world's most complex challenges. Our people are some of the greatest minds in the industry and truly make Lockheed Martin a great place to work.
With our employees as our priority, we provide diverse career opportunities designed to propel, develop, and boost agility. Our flexible schedules, competitive pay, and comprehensive benefits enable our employees to live a healthy, fulfilling life at and outside of work. We place an emphasis on empowering our employees by fostering an inclusive environment built upon integrity and corporate responsibility.
If this sounds like a culture you connect with, you're invited to apply for this role. Or, if you are unsure whether your experience aligns with the requirements of this position, we encourage you to search on Lockheed Martin Jobs, and apply for roles that align with your qualifications.
Other Important Information
By applying to this job, you are expressing interest in this position and could be considered for other career opportunities where similar skills and requirements have been identified as a match. Should this match be identified you may be contacted for this and future openings.
Ability to work remotely
Part-time Remote Telework: The employee selected for this position will work part of their work schedule remotely and part of their work schedule at a designated Lockheed Martin facility. The specific weekly schedule will be discussed during the hiring process.
Work Schedule Information
Lockheed Martin supports a variety of alternate work schedules that provide additional flexibility to our employees. Schedules range from standard 40 hours over a five day work week while others may be condensed. These condensed schedules provide employees with additional time away from the office and are in addition to our Paid Time off benefits.
Security Clearance Information
This position requires a government security clearance, you must be a US Citizen for consideration.
Pay Rate: The annual base salary range for this position in California and New York (excluding most major metropolitan areas), Colorado, Hawaii, Illinois, Maryland, Minnesota, Washington or Washington DC is $113,900 - $200,905. For states not referenced above, the salary range for this position will reflect the candidate's final work location. Please note that the salary information is a general guideline only. Lockheed Martin considers factors such as (but not limited to) scope and responsibilities of the position, candidate's work experience, education/ training, key skills as well as market and business considerations when extending an offer.
Benefits offered: Medical, Dental, Vision, Life Insurance, Short-Term Disability, Long-Term Disability, 401(k) match, Flexible Spending Accounts, EAP, Education Assistance, Parental Leave, Paid time off, and Holidays.
(Washington state applicants only) Non-represented full-time employees: accrue at least 10 hours per month of Paid Time Off (PTO) to be used for incidental absences and other reasons; receive at least 90 hours for holidays. Represented full time employees accrue 6.67 hours of Vacation per month; accrue up to 52 hours of sick leave annually; receive at least 96 hours for holidays. PTO, Vacation, sick leave, and holiday hours are prorated based on start date during the calendar year.
This position is incentive plan eligible.
Pay Rate: The annual base salary range for this position in most major metropolitan areas in California and New York is $131,000 - $227,125. For states not referenced above, the salary range for this position will reflect the candidate's final work location. Please note that the salary information is a general guideline only. Lockheed Martin considers factors such as (but not limited to) scope and responsibilities of the position, candidate's work experience, education/ training, key skills as well as market and business considerations when extending an offer.
Benefits offered: Medical, Dental, Vision, Life Insurance, Short-Term Disability, Long-Term Disability, 401(k) match, Flexible Spending Accounts, EAP, Education Assistance, Parental Leave, Paid time off, and Holidays.
This position is incentive plan eligible.
Design Verification Engineer
Folsom, CA Jobs
Job Details:Job Description:
Performs functional verification of IP logic to ensure design will meet specification requirements.
Develops IP verification plans, test benches, and the verification environment to ensure coverage to confirm to microarchitecture specifications.
Executes verification plans and defines and runs system simulation models to verify the design, analyze power and timing, and uncover bugs.
Replicates, root causes, and debugs issues in the presilicon environment. Finds and implements corrective measures to resolve failing tests. Collaborates with architects, RTL developers, and physical design teams to improve verification of complex architectural and microarchitectural features. Documents test plans and drives technical reviews of plans and proofs with design and architecture teams.
Maintains and improves existing functional verification infrastructure and methodology. Participates in the definition of verification infrastructure and related TFMs needed for functional design verification.
Qualifications:
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.
Minimum Qualifications:
Bachelors Degree in Computer Science, Computer Engineering or Electrical Engineering or another STEM related degree with 8+ years' experience OR
Masters Degree in Computer Science, Computer Engineering or Electrical Engineering or another STEM related degree with 6+ years' experience
5+ years' work experience:
working on IP or SoC development, verification, or integration using System Verilog/OVM/UVM
writing validation plans implement those validation plans using System Verilog
Preferred Qualifications:
3+ years of experience with DFI/DDR/LPDDR Protocols
3+ years of experience with DDR Phy verification or Memory Controller verification
Job Type:Experienced HireShift:Shift 1 (United States of America) Primary Location: US, California, FolsomAdditional Locations:US, Arizona, Phoenix, US, California, Santa Clara, US, Oregon, HillsboroBusiness group:The Client Computing Group (CCG) is responsible for driving business strategy and product development for Intel's PC products and platforms, spanning form factors such as notebooks, desktops, 2 in 1s, all in ones. Working with our partners across the industry, we intend to deliver purposeful computing experiences that unlock people's potential - allowing each person use our products to focus, create and connect in ways that matter most to them. As the largest business unit at Intel, CCG is investing more heavily in the PC, ramping its capabilities even more aggressively, and designing the PC experience even more deliberately, including delivering a predictable cadence of leadership products. As a result, we are able to fuel innovation across Intel, providing an important source of IP and scale, as well as help the company deliver on its purpose of enriching the lives of every person on earth.Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A
Benefits:
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:
**********************************
Annual Salary Range for jobs which could be performed in the US:
$161,230.00-$227,620.00
Salary range dependent on a number of factors including location and experience.
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.
Silicon Design Verification Engineer
San Jose, CA Jobs
WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world's most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives.
AMD together we advance_
THE ROLE:
As a member of the front-end verification team you will be part of a multi-site team to help drive successful verification execution and prove the functional correctness of the next generation of AMD/Xilinx programmable devices.
THE PERSON:
You have a passion for digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.
KEY RESPONSIBILITIES:
* Collaborate with architects, hardware and firmware engineers to understand the new features to be verified
* Take ownership of block level verification tasks
* Define test plans, test benches, and tests using System Verilog and UVM
* Debug RTL and Gate simulations and work with HW and SW development teams to verify fixes
* Review functional and code coverage metrics to meet the coverage requirements
* Develop and improve existing verification flows and environments
PREFERRED EXPERIENCE:
* Strong understanding of computer architecture and logic design
* Knowledge of Verilog, system Verilog and UVM is a must
* Strong understanding of state of the art verification techniques, including assertion and constraint-random metric-driven verification
* Working knowledge of C/C++ and Assembly programming languages
* Exposure to scripting (python preferred) for post-processing and automation
* Experience with gate level simulation, power and reset verification
ACADEMIC CREDENTIALS:
* Bachelors or Masters degree in computer engineering/Electrical Engineering or a related field
LOCATION: San Jose, CA
#LI-BS1
#LI-HYBRID
At AMD, your base pay is one part of your total rewards package. Your base pay will depend on where your skills, qualifications, experience, and location fit into the hiring range for the position. You may be eligible for incentives based upon your role such as either an annual bonus or sales incentive. Many AMD employees have the opportunity to own shares of AMD stock, as well as a discount when purchasing AMD stock if voluntarily participating in AMD's Employee Stock Purchase Plan. You'll also be eligible for competitive benefits described in more detail here.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.
Senior ASIC Design Verification Engineer
San Jose, CA Jobs
The application window is expected to close on 3/07/2025 Who We Are The Common Hardware Group (CHG) delivers the silicon, optics, and hardware platforms for Cisco's core Switching, Routing, and Wireless products. We craft the networking hardware for Enterprises and Service Providers, the Public Sector, and Non-Profit Organizations worldwide. Cisco Silicon One (#CiscoSiliconOne) is the only unifying silicon architecture in the market that enables customers to deploy the best-of-breed silicon from top-of-rack (TOR) switches through web-scale data centers and across service providers, enterprise networks, and data centers with a fully unified routing and switching portfolio.
Join us and shape Cisco's ground-breaking solutions by designing, developing, and testing some of the most complex ASICs being created in the industry.
Who You'll Work With
You will work with outstanding talent and vast ASIC development expertise in design, DV, DFT, physical design, and post-silicon validation
The team comprises micro-architects, front-end designers, and verification engineers.
Cisco is a system company, so you can also use the ASIC to work with the System and Software teams and participate in the journey from sample arrival through system validation to first customer shipments.
What You'll Do
* You will participate in the ASIC design verification for Cisco high-end switching products.
* Development of simulation models, test plans, direct and random tests, code or functional coverage, multi-chip/system simulation, and performance analysis.
* Collaborate with the hardware, software designers, and vendors.
Who You Are
* You can take on problems of moderate scope involving multiple modules, work under general supervision, and follow established procedures.
* You understand product-level architecture.
* Exercise judgment within defined standards and consult with management.
* Promote collaboration with team members.
Minimum Qualifications:
* Bachelor's degree in electrical or computer science or computer engineering with 7 years of related experience or Master's in electrical or computer science or computer engineering combined with 5 years of related experience
* Experience in System Verilog/UVM.
* Experience with ASIC design and verification processes, debugging, methodology, and tools.
* Experience in verifying blocks/clusters/full chip level for ASIC.
Preferred:
* Post-silicon lab bring-up experience is a plus.
* Knowledge of Linux is needed. C/C++ and Python/Perl are preferred.
* Knowledge of Networking is preferred.
* Experience with Formal verification is a plus.
Why Cisco?
#WeAreCisco. We are all unique, but collectively, we bring our talents to work as a team, to develop innovative technology, and to power a more inclusive, digital future for everyone. How do we do it? Well, for starters - with people like you!
Nearly every internet connection around the world touches Cisco. We're the Internet's optimists. Our technology makes sure the data traveling at light speed across connections does so securely, yet it's different from what we make but what we make happen which marks us out. We're helping those who work in the health service to connect with patients and each other, as well as schools, colleges, and universities, to teach even the most challenging times. We're helping businesses of all shapes and sizes to connect with their employees and customers in new ways, providing people with access to the digital skills they need and connecting the most remote parts of the world - whether through 5G or otherwise.
We tackle whatever challenges come our way. We have each other's backs, recognize our accomplishments, and grow together. We celebrate and support one another-from big and small things in life to big career moments. Giving back is in our DNA (we get 10 days off each year to do just that).
We know that powering an inclusive future starts with us. Without diversity and a dedication to equality, there is no moving forward. Our 30 Inclusive Communities, which unite people around commonalities or passions, lead the way. Together, we're committed to learning, listening, and caring for our communities while supporting the most vulnerable in a collective effort to make this world a better place, either with technology or through our actions.
So, you have colorful hair? Don't care. Tattoos? Show off your ink. Like polka dots? That's cool. Pop culture geek? Many of us are. Passion for technology and world-changing? Be you with us! #WeAreCisco
Message to applicants applying to work in the U.S. and/or Canada:
When available, the salary range posted for this position reflects the projected hiring range for new hire, full-time salaries in U.S. and/or Canada locations, not including equity or benefits. For non-sales roles the hiring ranges reflect base salary only; employees are also eligible to receive annual bonuses. Hiring ranges for sales positions include base and incentive compensation target. Individual pay is determined by the candidate's hiring location and additional factors, including but not limited to skillset, experience, and relevant education, certifications, or training. Applicants may not be eligible for the full salary range based on their U.S. or Canada hiring location. The recruiter can share more details about compensation for the role in your location during the hiring process.
U.S. employees have access to quality medical, dental and vision insurance, a 401(k) plan with a Cisco matching contribution, short and long-term disability coverage, basic life insurance and numerous wellbeing offerings.
Employees receive up to twelve paid holidays per calendar year, which includes one floating holiday (for non-exempt employees), plus a day off for their birthday. Non-Exempt new hires accrue up to 16 days of vacation time off each year, at a rate of 4.92 hours per pay period. Exempt new hires participate in Cisco's flexible Vacation Time Off policy, which does not place a defined limit on how much vacation time eligible employees may use, but is subject to availability and some business limitations. All new hires are eligible for Sick Time Off subject to Cisco's Sick Time Off Policy and will have eighty (80) hours of sick time off provided on their hire date and on January 1st of each year thereafter. Up to 80 hours of unused sick time will be carried forward from one calendar year to the next such that the maximum number of sick time hours an employee may have available is 160 hours. Employees in Illinois have a unique time off program designed specifically with local requirements in mind. All employees also have access to paid time away to deal with critical or emergency issues. We offer additional paid time to volunteer and give back to the community.
Employees on sales plans earn performance-based incentive pay on top of their base salary, which is split between quota and non-quota components. For quota-based incentive pay, Cisco typically pays as follows:
.75% of incentive target for each 1% of revenue attainment up to 50% of quota;
1.5% of incentive target for each 1% of attainment between 50% and 75%;
1% of incentive target for each 1% of attainment between 75% and 100%; and once performance exceeds 100% attainment, incentive rates are at or above 1% for each 1% of attainment with no cap on incentive compensation.
For non-quota-based sales performance elements such as strategic sales objectives, Cisco may pay up to 125% of target. Cisco sales plans do not have a minimum threshold of performance for sales incentive compensation to be paid.
ASIC Design Verification Engineer
San Jose, CA Jobs
This application window is expected to close 3/01/25. Who We Are The Common Hardware Group (CHG) delivers the silicon, optics, and hardware platforms for Cisco's core Switching, Routing, and Wireless products. We design the networking hardware for Enterprises and Service Providers, the Public Sector, and Non-Profit Organizations across the world. Cisco Silicon One (#CiscoSiliconOne) is the only unifying silicon architecture in the market that enables customers to deploy the best-of-breed silicon from Top of Rack (TOR) switches all the way through web scale data centers and across service provider, enterprise networks, and data centers with a fully unified routing and switching portfolio. Come join us and take part in shaping Cisco's ground-breaking solutions by designing, developing and testing some of the most complex ASICs being developed in the industry.
Who You'll Work With
You will engage in dynamic collaboration with verification engineers, designers, and cross-functional teams, working together to ensure the successful verification of the ASIC throughout its lifecycle.
What You'll Do
You will contribute to developing Cisco's revolutionary data center solutions by designing industry-leading complex chips, with full exposure to all aspects of our systems and applications, including silicon, hardware, software, telemetry, and security. Specific responsibilities include:
* Architect block, cluster and top-level DV environment infrastructure.
* Develop DV infrastructure from scratch for block, cluster and top-level environments.
* Maintain and enhance existing DV environments.
* Develop test plans and tests for qualifying design at block, cluster and higher-level environments with mix of constraint random and directed stimulus.
* Ensure complete verification coverage through implementation and review of code and functional coverage.
* Ensure RTL quality with qualifying the design with Gate Level Simulations on netlist.
* Collaborate closely with designers, architects, and software teams to address and debug issues during post-silicon bring-up, ensuring seamless integration and optimal performance.
* Support testing of design in emulation.
* Oversee and manage the ASIC bring-up process.
Who You Are
The Core Hardware Business Unit is on the lookout for a driven Senior Verification Engineer to join us in developing the next generation of Silicon One ASICs. You possess a deep understanding of the full ASIC development cycle, from specification to tape-out and lab validation, with hands-on experience in RTL verification and a mastery of best industry practices. Your proven track record in high-performance, high-volume semiconductor markets speaks for itself, and you're ready to apply your expertise to tackle complex challenges. This is your opportunity to make a significant impact in a transformative, fast-paced industry!
Minimum Qualifications
* Bachelor's Degree in EE, CE, or other related field.
* 7+ years of related ASIC design verification experience.
* Proficient in ASIC verification using UVM/System Verilog.
* Proficient in verifying complex blocks, clusters and top level for ASIC.
* Experience building test benches from scratch, hands on experience with System Verilog constraints, structures and classes.
* Scripting experience with Perl and/or Python.
Preferred Qualifications
* Master's Degree in EE or CE with 5+ years of related work experience.
* Experience with Forwarding logic/Parsers/P4.
* Experience with Veloce/Palladium/Zebu/HAPS.
* Formal verification (iev/vc formal) knowledge.
* Domain experience on one or more protocols (PCIe, Ethernet, RDMA, TCP).
Why Cisco?
#WeAreCisco. We are all unique, but collectively we bring our talents to work as a team, to develop innovative technology and power a more inclusive, digital future for everyone. How do we do it? Well, for starters - with people like you!
Nearly every internet connection around the world touches Cisco. We're the Internet's optimists. Our technology makes sure the data travelling at light speed across connections does so securely, yet it's not what we make but what we make happen which marks us out. We're helping those who work in the health service to connect with patients and each other; schools, colleges and universities to teach in even the most challenging of times. We're helping businesses of all shapes and size to connect with their employees and customers in new ways, providing people with access to the digital skills they need and connecting the most remote parts of the world - whether through 5G, or otherwise.
We tackle whatever challenges come our way. We have each other's backs, we recognize our accomplishments, and we grow together. We celebrate and support one another - from big and small things in life to big career moments. And giving back is in our DNA (we get 10 days off each year to do just that).
We know that powering an inclusive future starts with us. Because without diversity and a dedication to equality, there is no moving forward. Our 30 Inclusive Communities, that bring people together around commonalities or passions, are leading the way. Together we're committed to learning, listening, caring for our communities, whilst supporting the most vulnerable with a collective effort to make this world a better place either with technology, or through our actions.
So, you have colorful hair? Don't care. Tattoos? Show off your ink. Like polka dots? That's cool. Pop culture geek? Many of us are. Passion for technology and world changing? Be you, with us! #WeAreCisco
Cisco is an Affirmative Action and Equal Opportunity Employer and all qualified applicants will receive consideration for employment without regard to race, color, religion, gender, sexual orientation, national origin, genetic information, age, disability, veteran status, or any other legally protected basis.
Cisco will consider for employment, on a case by case basis, qualified applicants with arrest and conviction records.
ASIC Design Verification Engineer
San Jose, CA Jobs
This application window is expected to close 3/01/25. Meet the Team The Common Hardware Group (CHG) delivers the silicon, optics, and hardware platforms for Cisco's core Switching, Routing, and Wireless products. We design the networking hardware for Enterprises and Service Providers, the Public Sector, and Non-Profit Organizations across the world. Come join us and take part in shaping Cisco's ground-breaking solutions by designing, developing and testing some of the most complex ASICs being developed in the industry.
Your Impact
You will contribute to developing Cisco's revolutionary data center solutions by designing industry-leading complex chips, with full exposure to all aspects of our systems and applications, including silicon, hardware, software, telemetry, and security. Specific responsibilities include:
* Architect and develop block, cluster, and top-level DV infrastructure from scratch, including maintaining and enhancing existing environments.
* Create and execute test plans for design qualification at various levels, using a mix of constraint random and directed stimulus.
* Ensure comprehensive verification coverage through code and functional coverage implementation and review.
* Qualify RTL design quality with Gate Level Simulations and support emulation testing.
* Collaborate with cross-functional teams to debug and optimize designs during post-silicon bring-up and manage the ASIC bring-up process.
Minimum Qualifications
* Bachelor's Degree in EE, CE, or other related field.
* 5+ years of related ASIC design verification experience.
* Proficient in ASIC verification using UVM/System Verilog.
* Proficient in verifying complex blocks, clusters and top level for ASIC.
* Experience building test benches from scratch, hands on experience with System Verilog constraints, structures and classes.
* Scripting experience with Perl and/or Python.
Preferred Qualifications
* Master's Degree in EE or CE.
* Experience with Forwarding logic/Parsers/P4.
* Experience with Veloce/Palladium/Zebu/HAPS.
* Formal verification (iev/vc formal) knowledge.
* Domain experience on one or more protocols (PCIe, Ethernet, RDMA, TCP).
Why Cisco?
#WeAreCisco where every individual brings their unique skills and perspectives together to pursue our purpose of powering an inclusive future for all.
Our passion is connection-we celebrate our employees' diverse set of backgrounds and focus on unlocking potential. Cisconians often experience one company, many careers where learning and development are encouraged and supported at every stage. Our technology, tools, and culture pioneered hybrid work trends, allowing all to not only give their best, but be their best.
We understand our outstanding opportunity to bring communities together and at the heart of that is our people. One-third of Cisconians collaborate in our 30 employee resource organizations, called Inclusive Communities, to connect, foster belonging, learn to be informed allies, and make a difference. Dedicated paid time off to volunteer-80 hours each year-allows us to give back to causes we are passionate about, and nearly 86% do!
Our purpose, driven by our people, is what makes us the worldwide leader in technology that powers the internet. Helping our customers reimagine their applications, secure their enterprise, transform their infrastructure, and meet their sustainability goals is what we do best. We ensure that every step we take is a step towards a more inclusive future for all. Take your next step and be you, with us!
Cisco is an Affirmative Action and Equal Opportunity Employer and all qualified applicants will receive consideration for employment without regard to race, color, religion, gender, sexual orientation, national origin, genetic information, age, disability, veteran status, or any other legally protected basis.
Cisco will consider for employment, on a case by case basis, qualified applicants with arrest and conviction records.
ASIC Design Verification Engineer
San Jose, CA Jobs
The application window has been extended and is expected to close on 4/3/2025 This is an onsite role and will require working out of the Milpitas/San Jose office location. Who We Are: The Common Hardware Group (CHG) delivers the silicon, optics, and hardware platforms for Cisco's core Switching, Routing, and Wireless products. We design the networking hardware for Enterprises and Service Providers of various sizes, the Public Sector, and Non-Profit Organizations across the world. Cisco Silicon One (#CiscoSiliconOne) is the only unifying silicon architecture in the market that enables customers to deploy the best-of-breed silicon from Top of Rack (TOR) switches all the way through web-scale data centers and across service providers, enterprise networks, and data centers with a fully unified routing and switching portfolio. Come join us and take part in shaping Cisco's ground-breaking solutions by designing, developing, and testing some of the most complex ASICs being developed in the industry.
Who You'll Work With:
You will be in the Silicon One development organization as an ASIC design verification engineer in San Jose, CA. You collaborate closely with verification engineers, designers, hardware and cross-functional teams to verify the ASIC in simulation, in emulation, and during ASIC bring-up.
What You'll Do:
* Maintaining existing DV environments and enhancing them
* Construct testbench including scoreboard, agents, sequencers, and monitors for new blocks
* Write test plan, develop testcases, debug regression failures and drive to module verification closure
* Ensuring complete verification coverage through implementation and review of code and functional coverage
Minimum Qualifications:
* Bachelor's or Master's degree and 8 years of relevant experience required; prior experience with System Verilog and UVM methodology
* Prior experience in verifying complex blocks, clusters and top level for SoC
* Prior experience building testbenches from scratch, hands on experience with System Verilog constraints, structures and classes.
* Prior experience with functional coverage and constrained random DV environments.
* Scripting skills: Perl and/or Python scripting
Preferred Qualifications:
* Strong domain experience on one or more protocols in a plus - PCIe, CXL, Ethernet, AHB/AXI, DDR, MMU.
* Experience with Veloce/HAPS is a plus
* Formal verification (iev/vc formal) knowledge is a plus
#WeAreCisco
#WeAreCisco where every individual brings their unique skills and perspectives together to pursue our purpose of powering an inclusive future for all.
Our passion is connection-we celebrate our employees' diverse set of backgrounds and focus on unlocking potential. Cisconians often experience one company, many careers where learning and development are encouraged and supported at every stage. Our technology, tools, and culture pioneered hybrid work trends, allowing all to not only give their best, but be their best.
We understand our outstanding opportunity to bring communities together and at the heart of that is our people. One-third of Cisconians collaborate in our 30 employee resource organizations, called Inclusive Communities, to connect, foster belonging, learn to be informed allies, and make a difference. Dedicated paid time off to volunteer-80 hours each year-allows us to give back to causes we are passionate about, and nearly 86% do!
Our purpose, driven by our people, is what makes us the worldwide leader in technology that powers the internet. Helping our customers reimagine their applications, secure their enterprise, transform their infrastructure, and meet their sustainability goals is what we do best. We ensure that every step we take is a step towards a more inclusive future for all. Take your next step and be you, with us!
Cisco is an Affirmative Action and Equal Opportunity Employer and all qualified applicants will receive consideration for employment without regard to race, color, religion, gender, sexual orientation, national origin, genetic information, age, disability, veteran status, or any other legally protected basis.
Cisco will consider for employment, on a case by case basis, qualified applicants with arrest and conviction records.
Senior ASIC Design Verification Engineer
San Jose, CA Jobs
The application window is expected to close on 3/07/2025 Who We Are The Common Hardware Group (CHG) delivers the silicon, optics, and hardware platforms for Cisco's core Switching, Routing, and Wireless products. We craft the networking hardware for Enterprises and Service Providers, the Public Sector, and Non-Profit Organizations worldwide. Cisco Silicon One (#CiscoSiliconOne) is the only unifying silicon architecture in the market that enables customers to deploy the best-of-breed silicon from top-of-rack (TOR) switches through web-scale data centers and across service providers, enterprise networks, and data centers with a fully unified routing and switching portfolio.
Join us and shape Cisco's ground-breaking solutions by designing, developing, and testing some of the most complex ASICs being created in the industry.
Who You'll Work With
You will work with outstanding talent and vast ASIC development expertise in design, DV, DFT, physical design, and post-silicon validation
The team comprises micro-architects, front-end designers, and verification engineers.
Cisco is a system company, so you can also use the ASIC to work with the System and Software teams and participate in the journey from sample arrival through system validation to first customer shipments.
What You'll Do
* You will participate in the ASIC design verification for Cisco high-end switching products.
* Development of simulation models, test plans, direct and random tests, code or functional coverage, multi-chip/system simulation, and performance analysis.
* Collaborate with the hardware, software designers, and vendors.
Who You Are
* You can take on problems of moderate scope involving multiple modules, work under general supervision, and follow established procedures.
* You understand product-level architecture.
* Exercise judgment within defined standards and consult with management.
* Promote collaboration with team members.
Minimum Qualifications:
* Bachelor's degree in electrical or computer science or computer engineering with 7 years of related experience or Master's in electrical or computer science or computer engineering combined with 5 years of related experience
* Experience in System Verilog/UVM.
* Experience with ASIC design and verification processes, debugging, methodology, and tools.
* Experience in verifying blocks/clusters/full chip level for ASIC.
Preferred:
* Post-silicon lab bring-up experience is a plus.
* Knowledge of Linux is needed. C/C++ and Python/Perl are preferred.
* Knowledge of Networking is preferred.
* Experience with Formal verification is a plus.
Why Cisco?
#WeAreCisco. We are all unique, but collectively, we bring our talents to work as a team, to develop innovative technology, and to power a more inclusive, digital future for everyone. How do we do it? Well, for starters - with people like you!
Nearly every internet connection around the world touches Cisco. We're the Internet's optimists. Our technology makes sure the data traveling at light speed across connections does so securely, yet it's different from what we make but what we make happen which marks us out. We're helping those who work in the health service to connect with patients and each other, as well as schools, colleges, and universities, to teach even the most challenging times. We're helping businesses of all shapes and sizes to connect with their employees and customers in new ways, providing people with access to the digital skills they need and connecting the most remote parts of the world - whether through 5G or otherwise.
We tackle whatever challenges come our way. We have each other's backs, recognize our accomplishments, and grow together. We celebrate and support one another-from big and small things in life to big career moments. Giving back is in our DNA (we get 10 days off each year to do just that).
We know that powering an inclusive future starts with us. Without diversity and a dedication to equality, there is no moving forward. Our 30 Inclusive Communities, which unite people around commonalities or passions, lead the way. Together, we're committed to learning, listening, and caring for our communities while supporting the most vulnerable in a collective effort to make this world a better place, either with technology or through our actions.
So, you have colorful hair? Don't care. Tattoos? Show off your ink. Like polka dots? That's cool. Pop culture geek? Many of us are. Passion for technology and world-changing? Be you with us! #WeAreCisco
Cisco is an Affirmative Action and Equal Opportunity Employer and all qualified applicants will receive consideration for employment without regard to race, color, religion, gender, sexual orientation, national origin, genetic information, age, disability, veteran status, or any other legally protected basis.
Cisco will consider for employment, on a case by case basis, qualified applicants with arrest and conviction records.
ASIC Verification Engineer
San Jose, CA Jobs
Application window has been extended and expected to close 02/28/2025. Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received. Meet the Team The Common Hardware Group (CHG) delivers the silicon, optics, and hardware platforms for Cisco's core Switching, Routing, and Wireless products. We design the networking hardware for Enterprises and Service Providers of various sizes, the Public Sector, and Non-Profit Organizations across the world.
Cisco Silicon One (#CiscoSiliconOne) is the only unifying silicon architecture in the market that enables customers to deploy the best-of-breed silicon from Top of Rack (TOR) switches all the way through web scale data centers and across service provider, enterprise networks, and data centers with a fully unified routing and switching portfolio. Join us and take part in shaping Cisco's revolutionary solutions by designing, developing and testing some of the most complex ASICs being developed in the industry.
You will work with front-end RTL Design and Verification teams and Architects to understand chip architecture and drive design verification requirements. You'll work with SDK and Software teams as part of ASIC development to create a flawless handshake between hardware and software functionalities and qualify use-case requirements. You'll also have the opportunity to work with systems-testing teams during post-silicon validation efforts to bring-up, debug and qualify the ASIC in deployment-mode applications.
Your Impact
You have the ability to tackle problems of moderate scope involving multiple modules. You have an understanding of product level architecture. You promote team collaboration and communicate clearly among team members. You continuously seek out feedback to promote your professional development and growth. You work well both independently or with established guidelines and procedures
Minimum Qualifications:
* BSEE/CS combined with 4+ years of related experience.
* 4+ Years post graduate hands on experience with System Verilog / UVM programming
* 4+ Years post graduate ASIC Verification processes, methodologies, flows and tools
* Experience with scripting languages Python or Perl
* Previous experience in debugging
* Experience working on Linux / Unix
Preferred Qualifications:
* MSEE/CS combined with 3+ years of related experience
* Understanding of Networking technologies and concepts
* Experience with Formal verification
* Experience with Post-silicon lab bring-up
* Experience with C/C++ Programming
#WeAreCisco
#WeAreCisco where every individual brings their unique skills and perspectives together to pursue our purpose of powering an inclusive future for all.
Our passion is connection-we celebrate our employees' diverse set of backgrounds and focus on unlocking potential. Cisconians often experience one company, many careers where learning and development are encouraged and supported at every stage. Our technology, tools, and culture pioneered hybrid work trends, allowing all to not only give their best, but be their best.
We understand our outstanding opportunity to bring communities together and at the heart of that is our people. One-third of Cisconians collaborate in our 30 employee resource organizations, called Inclusive Communities, to connect, foster belonging, learn to be informed allies, and make a difference. Dedicated paid time off to volunteer-80 hours each year-allows us to give back to causes we are passionate about, and nearly 86% do!
Our purpose, driven by our people, is what makes us the worldwide leader in technology that powers the internet. Helping our customers reimagine their applications, secure their enterprise, transform their infrastructure, and meet their sustainability goals is what we do best. We ensure that every step we take is a step towards a more inclusive future for all. Take your next step and be you, with us!
Message to applicants applying to work in the U.S. and/or Canada:
When available, the salary range posted for this position reflects the projected hiring range for new hire, full-time salaries in U.S. and/or Canada locations, not including equity or benefits. For non-sales roles the hiring ranges reflect base salary only; employees are also eligible to receive annual bonuses. Hiring ranges for sales positions include base and incentive compensation target. Individual pay is determined by the candidate's hiring location and additional factors, including but not limited to skillset, experience, and relevant education, certifications, or training. Applicants may not be eligible for the full salary range based on their U.S. or Canada hiring location. The recruiter can share more details about compensation for the role in your location during the hiring process.
U.S. employees have access to quality medical, dental and vision insurance, a 401(k) plan with a Cisco matching contribution, short and long-term disability coverage, basic life insurance and numerous wellbeing offerings.
Employees receive up to twelve paid holidays per calendar year, which includes one floating holiday (for non-exempt employees), plus a day off for their birthday. Non-Exempt new hires accrue up to 16 days of vacation time off each year, at a rate of 4.92 hours per pay period. Exempt new hires participate in Cisco's flexible Vacation Time Off policy, which does not place a defined limit on how much vacation time eligible employees may use, but is subject to availability and some business limitations. All new hires are eligible for Sick Time Off subject to Cisco's Sick Time Off Policy and will have eighty (80) hours of sick time off provided on their hire date and on January 1st of each year thereafter. Up to 80 hours of unused sick time will be carried forward from one calendar year to the next such that the maximum number of sick time hours an employee may have available is 160 hours. Employees in Illinois have a unique time off program designed specifically with local requirements in mind. All employees also have access to paid time away to deal with critical or emergency issues. We offer additional paid time to volunteer and give back to the community.
Employees on sales plans earn performance-based incentive pay on top of their base salary, which is split between quota and non-quota components. For quota-based incentive pay, Cisco typically pays as follows:
.75% of incentive target for each 1% of revenue attainment up to 50% of quota;
1.5% of incentive target for each 1% of attainment between 50% and 75%;
1% of incentive target for each 1% of attainment between 75% and 100%; and once performance exceeds 100% attainment, incentive rates are at or above 1% for each 1% of attainment with no cap on incentive compensation.
For non-quota-based sales performance elements such as strategic sales objectives, Cisco may pay up to 125% of target. Cisco sales plans do not have a minimum threshold of performance for sales incentive compensation to be paid.
ASIC Verification Engineer
San Jose, CA Jobs
Application window has been extended and expected to close 02/28/2025. Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received. Meet the Team The Common Hardware Group (CHG) delivers the silicon, optics, and hardware platforms for Cisco's core Switching, Routing, and Wireless products. We design the networking hardware for Enterprises and Service Providers of various sizes, the Public Sector, and Non-Profit Organizations across the world.
Cisco Silicon One (#CiscoSiliconOne) is the only unifying silicon architecture in the market that enables customers to deploy the best-of-breed silicon from Top of Rack (TOR) switches all the way through web scale data centers and across service provider, enterprise networks, and data centers with a fully unified routing and switching portfolio. Join us and take part in shaping Cisco's revolutionary solutions by designing, developing and testing some of the most complex ASICs being developed in the industry.
You will work with front-end RTL Design and Verification teams and Architects to understand chip architecture and drive design verification requirements. You'll work with SDK and Software teams as part of ASIC development to create a flawless handshake between hardware and software functionalities and qualify use-case requirements. You'll also have the opportunity to work with systems-testing teams during post-silicon validation efforts to bring-up, debug and qualify the ASIC in deployment-mode applications.
Your Impact
You have the ability to tackle problems of moderate scope involving multiple modules. You have an understanding of product level architecture. You promote team collaboration and communicate clearly among team members. You continuously seek out feedback to promote your professional development and growth. You work well both independently or with established guidelines and procedures
Minimum Qualifications:
* BSEE/CS combined with 4+ years of related experience.
* 4+ Years post graduate hands on experience with System Verilog / UVM programming
* 4+ Years post graduate ASIC Verification processes, methodologies, flows and tools
* Experience with scripting languages Python or Perl
* Previous experience in debugging
* Experience working on Linux / Unix
Preferred Qualifications:
* MSEE/CS combined with 3+ years of related experience
* Understanding of Networking technologies and concepts
* Experience with Formal verification
* Experience with Post-silicon lab bring-up
* Experience with C/C++ Programming
\#WeAreCisco
\#WeAreCisco where every individual brings their unique skills and perspectives together to pursue our purpose of powering an inclusive future for all.
Our passion is connection-we celebrate our employees' diverse set of backgrounds and focus on unlocking potential. Cisconians often experience one company, many careers where learning and development are encouraged and supported at every stage. Our technology, tools, and culture pioneered hybrid work trends, allowing all to not only give their best, but be their best.
We understand our outstanding opportunity to bring communities together and at the heart of that is our people. One-third of Cisconians collaborate in our 30 employee resource organizations, called Inclusive Communities, to connect, foster belonging, learn to be informed allies, and make a difference. Dedicated paid time off to volunteer-80 hours each year-allows us to give back to causes we are passionate about, and nearly 86% do!
Our purpose, driven by our people, is what makes us the worldwide leader in technology that powers the internet. Helping our customers reimagine their applications, secure their enterprise, transform their infrastructure, and meet their sustainability goals is what we do best. We ensure that every step we take is a step towards a more inclusive future for all. Take your next step and be you, with us!
Cisco is an Affirmative Action and Equal Opportunity Employer and all qualified applicants will receive consideration for employment without regard to race, color, religion, gender, sexual orientation, national origin, genetic information, age, disability, veteran status, or any other legally protected basis.
Cisco will consider for employment, on a case by case basis, qualified applicants with arrest and conviction records.
ASIC Verification Engineer
San Jose, CA Jobs
The application window has been extended and is expected to close on 03/29/2025 Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received. Meet the Team The Common Hardware Group (CHG) delivers the silicon, optics, and hardware platforms for Cisco's core Switching, Routing, and Wireless products. We design the networking hardware for Enterprises and Service Providers of various sizes, the Public Sector, and Non-Profit Organizations across the world. Cisco Silicon One (#CiscoSiliconOne) is the only unifying silicon architecture in the market that enables customers to deploy the best-of-breed silicon from Top of Rack (TOR) switches all the way through web scale data centers and across service provider, enterprise networks, and data centers with a fully unified routing and switching portfolio. Come join us and take part in shaping Cisco's ground-breaking solutions by designing, developing and testing some of the most complex ASICs being developed in the industry.
Your Impact
As ASIC Verification Engineer in The Core Hardware Business Unit, you will be engaged the following tasks:
-Implementation of DV infrastructure for block, cluster and top level environments.
-Maintaining existing DV environments and enhancing them
-Ensuring complete verification coverage through implementation and review of code and functional coverage.
-Working closely with architects and designers to ensure verification completeness.
-Supporting tests done with emulation
-Engage in tasks to prepare for post-silicon-validation
-Ability to understand functional specifications outlined in design documentation to develop verification plan.
-Have good communication, interpersonal skills and a keen interest to work closely in a team environment.
-Networking knowledge preferred, but not essential.
Minimum Qualifications
-Bachelors of Science in Electrical Engineering or Computer Science or related degree
-5+ years of experience in high-performance ASIC verification.
-Experience with System Verilog HVL and HDL languages/tools
-Experience with Scripting and programming languages such as C++, Python or Perl, Shell
-Experience with object-oriented programming.
Preferred Qualifications
-Experience in emulation-based verification
-Experience with Networking knowledge
-Master's degree with 3+ years in high-performance ASIC verification.
-Experience with ASIC design and verification methodologies and flows.
\#WeAreCisco
\#WeAreCisco where every individual brings their unique skills and perspectives together to pursue our purpose of powering an inclusive future for all.
Our passion is connection-we celebrate our employees' diverse set of backgrounds and focus on unlocking potential. Cisconians often experience one company, many careers where learning and development are encouraged and supported at every stage. Our technology, tools, and culture pioneered hybrid work trends, allowing all to not only give their best, but be their best.
We understand our outstanding opportunity to bring communities together and at the heart of that is our people. One-third of Cisconians collaborate in our 30 employee resource organizations, called Inclusive Communities, to connect, foster belonging, learn to be informed allies, and make a difference. Dedicated paid time off to volunteer-80 hours each year-allows us to give back to causes we are passionate about, and nearly 86% do!
Our purpose, driven by our people, is what makes us the worldwide leader in technology that powers the internet. Helping our customers reimagine their applications, secure their enterprise, transform their infrastructure, and meet their sustainability goals is what we do best. We ensure that every step we take is a step towards a more inclusive future for all. Take your next step and be you, with us!
Cisco is an Affirmative Action and Equal Opportunity Employer and all qualified applicants will receive consideration for employment without regard to race, color, religion, gender, sexual orientation, national origin, genetic information, age, disability, veteran status, or any other legally protected basis.
Cisco will consider for employment, on a case by case basis, qualified applicants with arrest and conviction records.
Senior Mixed-Signal Design Verification Engineer
Senior Verification Engineer Job At NVIDIA
We are looking for an Engineer to verify the design and implementation of the world's leading SoC's and GPU's. This position offers the opportunity to have real impact in a multifaceted, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence!
We have crafted a team of extraordinary people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the high-speed Serdes platform for the future of computing. Join our dynamic team today!
What you'll be doing:
* As a key member of our circuit verification team, you will verify the design and implementation of the industry's leading GPU
* Be responsible for verification of the Mixed Signal CMOS circuit design, architecture, golden models using advanced verification methodologies
* Understand sophisticated mixed-signal CMOS circuits design and implementation, define the verification scope, develop the verification infrastructure and verify the correctness of the design
* You'll closely with multi-functional teams, circuit and logic design, verification, test engineering to accomplish tasks
What we need to see:
* Bachelors Degree in EE, CS or CE (or equivalent experience)
* 5+ years of proven experience
* Experience in deep sub-micron process design experience in CMOS Analog / Mixed Signal Circuit Design
* Skilled using design and verification tools (Cadence's IC design environment, analog circuit simulation tools like HSpice, Finesim, XA)
* Experience in crafting test bench environments for component and top level circuit verification
* Expertise in System Verilog or similar HVL
* Have strong debugging and analytical skills
* Perl and C/C++ programming language experience desirable
* Strong interpersonal skills and ability & desire to work as a great teammate are huge plus
The base salary range is 136,000 USD - 264,500 USD. Your base salary will be determined based on your location, experience, and the pay of employees in similar positions.
You will also be eligible for equity and benefits. NVIDIA accepts applications on an ongoing basis.
NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.
Senior ASIC Design Verification Engineer
Senior Verification Engineer Job At NVIDIA
NVIDIA is seeking a hardworking Senior ASIC Design Verification Engineer to help drive sign-off strategies for world's leading GPUs and SoCs. This position offers you an outstanding opportunity to influence performance of the next generation GPU and SoC, allowing you to have real impact in a multifaceted, technology-focused company with product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence!
We have crafted a team of highly motivated people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing.
What you will be doing:
Work as part of Global Circuits Team to develop various innovative IPs for hardware security, clocking, voltage regulation and silicon correlation.
Own the unit and sub-system level verification of various IPs, create functional test plans, and verify using advanced verification tools, flows and methodologies.
Build and reform world class verification infrastructure and methodologies to meet the unique demands of custom designed IPs.
Engage in design specification development by participating in discussions on architecture, intent, and implementation of the various IPs.
Enable system level integration by working with partner teams for test development & debug and delivering Verification IPs.
What we need to see:
BSEE (or equivalent experience) with 5+ years' experience in unit level or sub-system level verification or MS preferred in Electrical, Computer Engineering with 3+ years' experience in unit level or sub-system level verification.
Proficiency with Object Oriented Programming, System Verilog, Verilog, UVM, SVA and Functional Coverage.
Strong skills with VCS or equivalent simulation tools like Questa is required.
Strong debugging and analytical skills are required.
Have a continuous improvement mentality and passionate about delivering bug-free first silicon.
Strong interpersonal skills and ability to work with on-site and remote teams is a plus.
Ways to stand out from the crowd:
Experience in verification using random stimulus along with functional coverage and assertion-based verification methodologies is a huge plus.
Strong knowledge or work experience in Mixed signal and custom designed IPs solutions.
Good understanding of behavioral real number modeling and low level digital or mixed signal design concepts.
Strong knowledge or work experience in co-simulation environments such as VCS-XA or equivalent tools, Gate Level Simulation or Formal Equivalence domains.
Proficiency in scripting language, such as, Perl, Tcl, Make files and automation methods/algorithms a certain plus.
With competitive salaries and a generous benefits package, NVIDIA is widely considered to be one of the technology world's most desirable employers. We welcome you join our team with some of the most hard-working people in the world working together to promote rapid growth. Are you passionate about becoming a part of a best-in-class team supporting the latest in GPU and AI technology? If so, we want to hear from you.
#LI-Hybrid
The base salary range is 136,000 USD - 264,500 USD. Your base salary will be determined based on your location, experience, and the pay of employees in similar positions.
You will also be eligible for equity and benefits.
NVIDIA accepts applications on an ongoing basis.
NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.
Pre - Silicon Verification Engineer
San Jose, CA Jobs
WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world's most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives.
AMD together we advance_
THE ROLE:
Adaptive and Embedded Computing Group (AECG) seeks a Pre- Silicon Verification Engineer to provide expertise in the verification of high-speed Crypto, Network-on-Chip (NoC), and cutting-edge DRAM Memory Controller IPs (LPDDR6, HBM4). You will be responsible for architecting, developing, and utilizing simulation and/or formal-based verification environments at both block and SoC-level to achieve first-pass silicon success.
THE PERSON:
The ideal candidate has a proven track record in driving strategies and successfully executing verification strategies for Pre-Silicon Design IP and/or SOC designs. They should be strong team players with excellent communication and leadership skills, capable of positively and strategically influencing design teams to improve overall product quality.
KEY RESPONSIBILITIES:
* Lead the verification of high-speed Crypto, Network-on-Chip (NoC), cutting-edge DRAM Memory controller (LPDDR6, HBM4) designs, ensuring the highest standards of quality and performance.
* Architect, develop, and use simulation and/or formal-based verification environments at IP and SoC-level.
* Lead and manage verification teams, including planning, execution, tracking, verification closure, and delivery to programs.
* Develop and execute comprehensive verification plans, including testbenches and test cases.
* Collaborate with design, architecture, and software teams to define and implement verification strategies.
* Utilize advanced verification methodologies, including UVM, formal verification, and assertion-based verification.
* Mentor and guide junior engineers, fostering a collaborative and innovative team environment
PREFERRED EXPERIENCE:
* Require experience with development of UVM and System Verilog test benches and usage of simulation tools/debug environments such as Synopsys VCS or Cadence Xcelium.
* Require strong understanding of state of the art of verification techniques, including assertion and metric-driven verification. Experience as a verification architect, establishing the verification methodology, tools and infrastructure for high-performance IP and/or VLSI designs is a plus.
* Require familiarity with verification management tools as well as an understanding of database management particularly as it pertains to regression management.
* Experience with formal property checking tools such as VC Formal (Synopsys), JasperGold (Cadence), and Questa Formal (Mentor) is a plus.
* Experience with gate-level simulation, power-aware verification is a plus.
* Experience with silicon debug at the tester and board level, is a plus.
ACADEMIC CREDENTIALS:
* Require BS or MS or PhD in Electrical Engineering, Computer Engineering or Computer Science.
LOCATION: San Jose, CA
#LI-DW1
#LI-HYBRID
At AMD, your base pay is one part of your total rewards package. Your base pay will depend on where your skills, qualifications, experience, and location fit into the hiring range for the position. You may be eligible for incentives based upon your role such as either an annual bonus or sales incentive. Many AMD employees have the opportunity to own shares of AMD stock, as well as a discount when purchasing AMD stock if voluntarily participating in AMD's Employee Stock Purchase Plan. You'll also be eligible for competitive benefits described in more detail here.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.
ASIC Verification Engineer
San Diego, CA Jobs
WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world's most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives.
AMD together we advance_
THE ROLE:
AMD is seeking a skilled ASIC Verification Engineer to plan, build, and execute the verification of new and existing features for AMD's graphics processor IP, with the critical objective of delivering designs with zero bugs in the final product design.
THE PERSON:
The ideal candidate will leverage deep technical expertise to systematically validate complex GPU architectures, ensuring the highest standards of design integrity and performance across our graphics processor technologies. You'll have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/time zones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.
KEY RESPONSIBILITIES:
* Collaborate with architects, hardware engineers, and firmware engineers to understand the new features to be verified
* Build test plan documentation, accounting for interactions with other features, the hardware, the firmware, and the software driver use cases
* Estimate the time required to write the new feature tests and any required changes to the test environment
* Build the directed and random verification tests
* Debug test failures to determine the root cause; work with RTL and firmware engineers to resolve design defects and correct any test issues
* Review functional and code coverage metrics - modify or add tests or constrain random tests to meet the coverage requirements
PREFERRED EXPERIENCE:
* Proficient in IP level ASIC verification
* Proficient in debugging firmware and RTL code using simulation tools
* Proficient in using UVM testbenches and working in Linux and Windows environments
* Experienced with Verilog, System Verilog, C, and C++
* Graphics pipeline knowledge
* Developing UVM based verification frameworks and testbenches, processes and flows
* Automating workflows in a distributed compute environment.
* Exposure to simulation profile, efficiency improvement, acceleration, HLS tools/process
* Strong background in the C++ language, preferably on Linux with exposure to Windows platform
* Good understanding and hands-on experience in the UVM concepts and SystemVerilog language
* Good working knowledge of SystemC and TLM with some related experience.
* Scripting language experience: Perl, Ruby, Makefile, shell preferred.
* Exposure to leadership or mentorship is an asset
* Desirable assets with prior exposure to Shader/SIMD processor.
ACADEMIC CREDENTIALS:
* Undergrad is required. Bachelors or Masters degree in computer engineering/Electrical Engineering preferred
LOCATION: San Diego, CA preferred but other locations can include Folsom, CA - Santa Clara, CA - San Jose, CA - Austin, TX
#LI-BM1
#LI-Hybrid
At AMD, your base pay is one part of your total rewards package. Your base pay will depend on where your skills, qualifications, experience, and location fit into the hiring range for the position. You may be eligible for incentives based upon your role such as either an annual bonus or sales incentive. Many AMD employees have the opportunity to own shares of AMD stock, as well as a discount when purchasing AMD stock if voluntarily participating in AMD's Employee Stock Purchase Plan. You'll also be eligible for competitive benefits described in more detail here.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.